A novel PLL architecture
Fecha
2000Versión
Acceso abierto / Sarbide irekia
Tipo
Contribución a congreso / Biltzarrerako ekarpena
Versión
Versión publicada / Argitaratu den bertsioa
Impacto
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nodoi-noplumx
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Resumen
A novel phase-locked loop scheme is
proposed in this paper, whose main distinguishing
features are infinite hold-in range, pull-out range
fractionally constant and also a ripple fractionally
constant. To this end, it incorporates a variable gain
amplifer and a frequency tunable loop filter. The
driving application is the on-chip automatic tuning
of slave filters, although the PLL architect ...
[++]
A novel phase-locked loop scheme is
proposed in this paper, whose main distinguishing
features are infinite hold-in range, pull-out range
fractionally constant and also a ripple fractionally
constant. To this end, it incorporates a variable gain
amplifer and a frequency tunable loop filter. The
driving application is the on-chip automatic tuning
of slave filters, although the PLL architecture can
be employed in many other applications. [--]
Materias
Phase-locked loop architecture
Notas
Trabajo presentado al XV Simposium Nacional de la Unión Científica de Radio (URSI '00), Zaragoza, 2000
Departamento
Universidad Pública de Navarra. Departamento de Ingeniería Eléctrica y Electrónica /
Nafarroako Unibertsitate Publikoa. Ingeniaritza Elektrikoa eta Elektronikoa Saila
Entidades Financiadoras
This work has been suported by the CICYT under grant TIC 97-418-C02-01.