Listar Artículos de revista - Aldizkari artikuluak por autor UPNA "López Martín, Antonio"
Mostrando ítems 1-20 de 30
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±0.25 V Class-AB CMOS capacitance multiplier and precision rectifiers
Reduction of minimum supply requirements is a crucial aspect to decrease the power consumption in VLSI systems. A high performance capacitance multiplier able to operate with supplies as low as ±0.25 V is presented. It is ... -
±0.3v bulk-driven fully differential buffer with high figures of merit
A high performance bulk-driven rail-to-rail fully differential buffer operating from ±0.3V supplies in 180 nm CMOS technology is reported. It has a differential–difference input stage and common mode feedback circuits ... -
A 1.2-V current-mode RMS-to-DC converter based on a novel two-quadrant electronically simulated MOS translinear loop
A novel current-mode CMOS RMS-to-DC converter using translinear techniques is introduced. It is based on a squarer/divider cell that is implemented using an electronically simulated loop with a novel biasing scheme that ... -
360 nW gate-driven ultra-low voltage CMOS linear transconductor with 1 MHz bandwidth and wide input range
A low voltage linear transconductor is introduced. The circuit is a pseudo differential architecture that operates with ±0.2V supplies and uses 900nA total biasing current. It employs a floating battery technique to achieve ... -
AC amplifiers with ultra-low corner frequency by using bootstrapping
A novel architecture for an AC (i.e. high-pass) amplifier is proposed allowing a drastic reduction of the cutoff frequency to the sub-Hertz range. It builds upon the classic AC configuration with a high gain amplifier and ... -
AC coupled amplifier with a resistance multiplier technique for ultra-low frequency operation
This paper proposes a novel, tunable AC coupled capacitive feedback amplifier, exhibiting an ultra-low high pass corner frequency. This is accomplished by actively boosting the output resistive value of a MOS transistor ... -
Analog lock-in amplifier design using subsampling for accuracy enhancement in GMI sensor applications
A frequency downscaling technique for enhancing the accuracy of analog lock-in amplifier (LIA) architectures in giant magneto-impedance (GMI) sensor applications is presented in this paper. As a proof of concept, the ... -
Class AB amplifier with enhanced slew rate and GBW
The design of a micropower class AB operational transconductance amplifier with large dynamic current to quiescent current ratio is addressed. It is based on a compact and power-efficient adaptive biasing circuit and a ... -
CMOS first-order all-pass filter with 2-Hz pole frequency
A CMOS fully integrated all-pass filter with an extremely low pole frequency of 2 Hz is introduced in this paper. It has 0.08-dB passband ripple and 0.029-mm2 Si area. It has 0.38-mW power consumption in strong inversion ... -
Design of MOS-translinear multiplier/dividers in analog VLSI
A general framework for designing current-mode CMOS analog multiplier/divider circuits based on the cascade connection of a geometric-mean circuit and a squarer/ divider is presented. It is shown how both building blocks ... -
Energy-efficient amplifiers based on quasi-floating gate techniques
Energy efficiency is a key requirement in the design of amplifiers for modern wireless applications. The use of quasi-floating gate (QFG) transistors is a very convenient approach to achieve such energy efficiency. We ... -
An enhanced gain-bandwidth class-AB miller op-amp with 23,800 MHz pF/mW FOM, 11-16 current efficiency and wide range of resistive and capacitive loads driving capability
A compact power-efficient class-AB Miller op-amp is introduced. It uses a simple auxiliary circuit that enhances the op-amp's gain-bandwidth product and helps to drive a wide range of capacitive and resistive loads with ... -
Enhanced single-stage folded cascode OTA suitable for large capacitive loads
An enhanced single-stage folded cascode operational transconductance amplifier able to drive large capacitive loads is presented. Circuits that adaptively bias the input differential pair and the current folding stage ... -
A family of alternating current amplifiers for ultra-low frequency operation
A family of capacitively coupled alternating current (AC) amplifiers featuring ultra-low (below 1 Hz) corner frequency is presented. This is achieved by using high-gain devices which actively boost feedback resistance and ... -
Fault detection of planetary gears based on signal space constellations
A new method to process the vibration signal acquired by an accelerometer placed in a planetary gearbox housing is proposed, which is useful to detect potential faults. The method is based on the phenomenological model and ... -
Gain-boosted super class AB OTAs based on nested local feedback
A new approach to design super class AB operational transcon-ductance amplifiers (OTAs) with enhanced large-signal and small-signal performance is presented. It is based on employing two nested positive and negative feedback ... -
A highly efficient composite class-AB–AB Miller op-amp with high gain and stable from 15 pF up to very large capacitive loads
In this paper, a highly power-efficient class-AB–AB Miller op-amp is discussed. The structure uses gm enhancement based on local common-mode feedback to provide class-AB operation with enhanced effective gm , open-loop ... -
Low-power class-AB CMOS voltage feedback current operational amplifier with tunable gain and bandwidth
A CMOS class AB variable gain Voltage Feedback Current Operational Amplifier (VFCOA) is presented. The implementation is based on class AB second generation current conveyors and exploits an electronically tunable ... -
Low-power ultrasonic front-end for cargo container monitoring
A low-power ultrasonic communication system conceived for cargo container monitoring is presented. Two piezoelectric transducers operating at 40 kHz are used for generating and acquiring an ultrasonic signal through the ... -
Low-voltage 0.81mW, 1-32 CMOS VGA with 5% bandwidth variations and -38dB DC rejection
A CMOS low-voltage amplifier with approximately constant bandwidth and DC rejection is introduced. The design is based on the cascade of a wide linear input range OTA, an op-amp and a servo-loop with extremely large time ...