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A novel design method for phase-locked loops of any order and type
| dc.creator | Carlosena García, Alfonso | es_ES |
| dc.creator | Mànuel Lázaro, Antonio | es_ES |
| dc.date.accessioned | 2017-08-18T10:39:25Z | |
| dc.date.available | 2017-08-18T10:39:25Z | |
| dc.date.issued | 2006 | |
| dc.identifier.citation | A. Carlosena and A. Manuel-Latzaro, "A Novel Design Method for Phase-Locked Loops of any Order and Type," 2006 49th IEEE International Midwest Symposium on Circuits and Systems, San Juan, 2006, pp. 569-573. doi: 10.1109/MWSCAS.2006.381794 | en |
| dc.identifier.isbn | 1-4244-0172-0 (Print) | |
| dc.identifier.issn | 1548-3746 (Print) | |
| dc.identifier.issn | 1558-3899 (Electronic) | |
| dc.identifier.uri | https://hdl.handle.net/2454/25197 | |
| dc.description.abstract | In this paper a novel approach to the design of PLLs is presented, which can be used regardless of their Order and Type. The method stems from the fact that high-frequency poles in the loop filter determine filtering properties of the PLL, while zeropole (at the origin) pairs determine its Type and thus the loop control dynamics. | en |
| dc.description.sponsorship | This paper has been supported by the DGCYT, Grant DPI2003-08637-C03. | en |
| dc.format.extent | 5 p. | |
| dc.format.mimetype | application/pdf | en |
| dc.language.iso | eng | en |
| dc.publisher | IEEE | en |
| dc.relation.ispartof | 2006 49th IEEE International Midwest Symposium on Circuits and Systems. Puerto Rico, 2006, pp. 569-573. | en |
| dc.rights | © 2006 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works. | en |
| dc.subject | Phase-locked loops | en |
| dc.subject | Loop filters | en |
| dc.subject | Modulators | en |
| dc.subject | Frequency sinthesizers | en |
| dc.subject | Feedback systems | en |
| dc.title | A novel design method for phase-locked loops of any order and type | en |
| dc.type | Contribución a congreso / Biltzarrerako ekarpena | es |
| dc.type | info:eu-repo/semantics/conferenceObject | en |
| dc.contributor.department | Ingeniería Eléctrica y Electrónica | es_ES |
| dc.contributor.department | Ingeniaritza Elektrikoa eta Elektronikoa | eu |
| dc.rights.accessRights | Acceso abierto / Sarbide irekia | es |
| dc.rights.accessRights | info:eu-repo/semantics/openAccess | en |
| dc.identifier.doi | 10.1109/MWSCAS.2006.381794 | |
| dc.relation.publisherversion | https://doi.org/10.1109/MWSCAS.2006.381794 | |
| dc.type.version | Versión aceptada / Onetsi den bertsioa | es |
| dc.type.version | info:eu-repo/semantics/acceptedVersion | en |
