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López Martín, Antonio

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https://academica-e.unavarra.es/handle/2454/49446

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López Martín

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Antonio

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Ingeniería Eléctrica, Electrónica y de Comunicación

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ISC. Institute of Smart Cities

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0000-0001-7629-0305

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2254

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2021 - 20234
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Author: Beloso Legarra, Javier × Author: Cruz Blas, Carlos Aristóteles de la ×

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Now showing 1 - 4 of 4
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    PublicationOpen Access
    Single-stage class-AB non-linear current mirror OTA
    (IEEE, 2022) Beloso Legarra, Javier; Cruz Blas, Carlos Aristóteles de la; López Martín, Antonio; Institute of Smart Cities - ISC
    The analysis, design and experimental characterization of a single-stage class-AB operational transconductance amplifier (OTA) with enhanced large- and small-signal performance is presented. The OTA is biased in weak inversion to save power and employs a non-linear current mirror as active load, leading a boosting current directly at the output branch. As a result, the amplifier's performance is improved without additional circuit elements and/or power consumption. A chip prototype has been fabricated in a 180-nm CMOS process, consuming a quiescent power of 2.5 µW from a supply voltage of ±0.5 V and a silicon area of 0.0013 mm 2 . For a load of 160 pF, it exhibits an average slew rate of 0.94 V/µs and a gain-bandwidth product of 22.1 kHz.
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    PublicationUnknown
    Power-efficient single-stage class-AB OTA based on non-linear nested current mirrors
    (IEEE, 2023) Beloso Legarra, Javier; Cruz Blas, Carlos Aristóteles de la; López Martín, Antonio; Institute of Smart Cities - ISC
    A novel approach to design low-power area-efficient rail-to-rail output single-stage class-AB operational transconductance amplifiers (OTAs) with enhanced large- and small-signal performance to drive large capacitive loads is presented. It is based on a non-linear nested current mirror at the active load of a splitted differential input pair biased in weak inversion that boosts dynamic currents beyond their quiescent value directly at the output branch. As a result, slew rate, DC gain, gainbandwidth product, settling time and noise performance are improved without additional circuit elements or power consumption. An OTA prototype has been fabricated in a 180-nm CMOS process, consuming a quiescent power of 2.9 µW from a supply voltage of ±0.5 V and a silicon area of 0.001 mm2 . Measurement results validate the advantages of the proposal, exhibiting positive and negative slew rates of 110 V/ms and −58 V/ms, respectively, and a gain-bandwidth product of 136 kHz with a phase margin of 90◦ for a capacitive load of 160 pF.
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    PublicationOpen Access
    A family of alternating current amplifiers for ultra-low frequency operation
    (Wiley, 2021) Martincorena Arraiza, Maite; Carlosena García, Alfonso; Cruz Blas, Carlos Aristóteles de la; Beloso Legarra, Javier; López Martín, Antonio; Ingeniaritza Elektrikoa, Elektronikoaren eta Telekomunikazio Ingeniaritzaren; Institute of Smart Cities - ISC; Ingeniería Eléctrica, Electrónica y de Comunicación; Universidad Pública de Navarra / Nafarroako Unibertsitate Publikoa
    A family of capacitively coupled alternating current (AC) amplifiers featuring ultra-low (below 1 Hz) corner frequency is presented. This is achieved by using high-gain devices which actively boost feedback resistance and thus reduce corner frequency. This procedure is often termed, though with a different purpose, as 'bootstrapping'. The proposed architectures are very general and admit several possible practical implementations. To demonstrate their usefulness, the circuits are implemented with two operational amplifiers (OA), but other active devices such as operational transconductance amplifiers (OTAs) can be alternatively used. All circuits have been theoretically analyzed, extensively simulated and measured, exhibiting high-pass cutoff frequencies as low as 30 mHz.
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    PublicationOpen Access
    Gain-boosted super class AB OTAs based on nested local feedback
    (IEEE, 2021) Beloso Legarra, Javier; Cruz Blas, Carlos Aristóteles de la; López Martín, Antonio; Ramírez-Angulo, Jaime; Ingeniaritza Elektrikoa, Elektronikoaren eta Telekomunikazio Ingeniaritzaren; Institute of Smart Cities - ISC; Ingeniería Eléctrica y Electrónica
    A new approach to design super class AB operational transcon-ductance amplifiers (OTAs) with enhanced large-signal and small-signal performance is presented. It is based on employing two nested positive and negative feedback loops at the active load of an adaptively biased differential pair in weak inversion region. As a result, DC gain, gain-bandwidth product, settling time and noise are improved compared to conventional super class AB OTAs without extra circuit nodes or power consumption. Measurement results of a 180 nm CMOS test chip prototype show a current boosting factor higher than 5000 and a nearly ideal current efficiency. Due to the ultra-low quiescent currents and high driving capability, the circuit exhibits an excellent large-signal figure-of-merit (FOML) of 236 V-1. To illustrate the applicability of the proposed approach, a differential sample-and-hold (S/H) circuit was designed and fabricated on the same test chip. Measurement results of the S/H validate the advantages of the proposal.