Person:
López Martín, Antonio

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López Martín

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Antonio

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Ingeniería Eléctrica, Electrónica y de Comunicación

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ISC. Institute of Smart Cities

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0000-0001-7629-0305

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2254

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Now showing 1 - 2 of 2
  • PublicationOpen Access
    Low-power ultrasonic front-end for cargo container monitoring
    (IEEE, 2019) Algueta-Miguel, Jose M.; García Oya, José Ramón; López Martín, Antonio; Cruz Blas, Carlos Aristóteles de la; Muñoz Chavero, Fernando; Hidalgo Fort, Eduardo; Institute of Smart Cities - ISC
    A low-power ultrasonic communication system conceived for cargo container monitoring is presented. Two piezoelectric transducers operating at 40 kHz are used for generating and acquiring an ultrasonic signal through the metallic wall, thus establishing a non-invasive inside-outside communication that preserves the container integrity. Both transducers are fixed by means of a novel magnetic case designed for optimizing data transmission. The acoustic and electrical characteristics of the ultrasonic channel are analyzed. An experimental measurement setup based on FPGA has been implemented for comparing some basic modulation and detection schemes in terms of Bit Error Rate (BER), also considering their robustness against undesired mechanical and electromagnetic perturbations. On this basis, a compact digital DBPSK modulator using a square carrier signal is proposed. Frequency and amplitude tracking algorithms are designed for optimizing the quality and robustness of the data transmission. Finally, a low-power low-rate (up to few kbps) architecture based on the previous elements is presented. All the proposed contributions are experimentally validated.
  • PublicationOpen Access
    Enhanced single-stage folded cascode OTA suitable for large capacitive loads
    (IEEE, 2018) López Martín, Antonio; Garde Luque, María Pilar; Algueta-Miguel, Jose M.; Cruz Blas, Carlos Aristóteles de la; Carvajal, Ramón G.; Ramírez-Angulo, Jaime; Institute of Smart Cities - ISC
    An enhanced single-stage folded cascode operational transconductance amplifier able to drive large capacitive loads is presented. Circuits that adaptively bias the input differential pair and the current folding stage are employed, which provide class AB operation with dynamic current boosting and increased gainbandwidth (GBW) product. Measurement results of a test chip prototype fabricated in a 0.5-µm CMOS process show an increase in slew rate and GBW by a factor of 30 and 15, respectively, versus the class A version using the same supply voltage and bias currents. Overhead in other performance metrics is small.