Person:
López Martín, Antonio

person.page.identifierURI

https://academica-e.unavarra.es/handle/2454/49446

Last Name

López Martín

First Name

Antonio

person.page.departamento

Ingeniería Eléctrica, Electrónica y de Comunicación

person.page.instituteName

ISC. Institute of Smart Cities

ORCID

0000-0001-7629-0305

person.page.upna

2254

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Now showing 1 - 10 of 25

Open Access
Micropower class AB low-pass analog filter based on the super-source follower
(IEEE, 2022) Martincorena Arraiza, Maite; Cruz Blas, Carlos Aristóteles de la; López Martín, Antonio; Carlosena García, Alfonso; Institute of Smart Cities - ISC
An improved class AB version of the super source follower is used to implement a compact and power-efficient second order analog low-pass filter. The proposed circuit achieves a 41% power reduction as well as an improvement in linearity and pass band gain with respect to its class A counterpart. Measurement results of a test chip prototype fabricated in a 180 nm CMOS technology show a power consumption ranging from 50.3 μW to 85.27 μW for cutoff frequencies from 600 kHz to 890 kHz, with a supply voltage of ±0.75 V. A third order intermodulation distortion of −35.34 dB (for an input signal of 0.4 mV pp and 350 kHz) and a THD of −69.7 dB (for an input signal of 0.4 mV pp and 100 kHz) are measured, which results in an improvement with respect to the conventional class A version of 13.98 dB and 43.6 dB, respectively. The silicon area is 0.0592 mm 2 (using external capacitors).
Open Access
Single-stage class-AB non-linear current mirror OTA
(IEEE, 2022) Beloso Legarra, Javier; Cruz Blas, Carlos Aristóteles de la; López Martín, Antonio; Institute of Smart Cities - ISC
The analysis, design and experimental characterization of a single-stage class-AB operational transconductance amplifier (OTA) with enhanced large- and small-signal performance is presented. The OTA is biased in weak inversion to save power and employs a non-linear current mirror as active load, leading a boosting current directly at the output branch. As a result, the amplifier's performance is improved without additional circuit elements and/or power consumption. A chip prototype has been fabricated in a 180-nm CMOS process, consuming a quiescent power of 2.5 µW from a supply voltage of ±0.5 V and a silicon area of 0.0013 mm 2 . For a load of 160 pF, it exhibits an average slew rate of 0.94 V/µs and a gain-bandwidth product of 22.1 kHz.
Open Access
AC coupled amplifier with a resistance multiplier technique for ultra-low frequency operation
(Elsevier, 2022) Martincorena Arraiza, Maite; Cruz Blas, Carlos Aristóteles de la; Carlosena García, Alfonso; López Martín, Antonio; Ingeniaritza Elektrikoa, Elektronikoaren eta Telekomunikazio Ingeniaritzaren; Institute of Smart Cities - ISC; Ingeniería Eléctrica, Electrónica y de Comunicación; Universidad Pública de Navarra / Nafarroako Unibertsitate Publikoa
This paper proposes a novel, tunable AC coupled capacitive feedback amplifier, exhibiting an ultra-low high pass corner frequency. This is accomplished by actively boosting the output resistive value of a MOS transistor in weak inversion. The circuit is based on a more general architecture, recently proposed by the authors, and is analyzed in terms of its capability to achieve ultra-low frequency operation, its DC performance, and noise. The proposed technique is demonstrated via measurement results from a fabricated test chip prototype using a standard 0.18 µm CMOS technology. The proposed amplifier provides a tunable high pass corner frequency from 20 mHz to 475 mHz, consuming 4.71 μW and a total area of 0.069 mm2.
Open Access
Two-stage OTA with all subthreshold MOSFETs and optimum GBW to DC-current ratio
(IEEE, 2022) Beloso Legarra, Javier; Grasso, A.; López Martín, Antonio; Palumbo, Gaetano; Pennisi, Salvatore; Institute of Smart Cities - ISC
An approach for the design of two-stage classAB OTAs with sub-1µA current consumption is proposed and demonstrated. The approach employs MOS transistors operating in subthreshold and allows maximum gain-bandwidth product (GBW) to be achieved for a given DC current budget, by setting optimum distribution of DC currents in the two amplifier stages. Following this strategy, a class AB OTA was designed in a standard 0.5-µm CMOS technology supplied from 1.6-V and experimentally tested. Measured GBW was 307 kHz with 980-nA DC current consumption while driving an output capacitance of 40 pF with an average slew rate of 96 V/ms
Open Access
Low-voltage 0.81mW, 1-32 CMOS VGA with 5% bandwidth variations and -38dB DC rejection
(IEEE, 2020) López Martín, Antonio; Rico-Aniles, Héctor Daniel; Ramírez-Angulo, Jaime; Rocha-Pérez, José Miguel; González Carvajal, Ramón; Institute of Smart Cities - ISC
A CMOS low-voltage amplifier with approximately constant bandwidth and DC rejection is introduced. The design is based on the cascade of a wide linear input range OTA, an op-amp and a servo-loop with extremely large time constants. It operates with +/-0:45V supplies and a power consumption of 0.81mW in 180nm technology. The bandwidth changes only from 9.08MHz to 9.54MHz over a gain range from 1 to 32, it has a 9.8Hz low cutoff frequency and a DC attenuation of 38dBs. DC floating voltage sources are used to keep the gates of all differential pairs at a constant value close to a supply rail in order to operate the amplifier circuit with minimum supply voltage. The proposed circuit has small and large signal figures of merit FOMSS=5380 (MHz*pF/mW) and FOMLS=0:0085((V/ns)*pF/mA) for a nominal gain A=32.
Open Access
Wide-swing class AB regulated cascode current mirror
(IEEE, 2020) Garde Luque, María Pilar; López Martín, Antonio; Cruz Blas, Carlos Aristóteles de la; Carvajal, Ramón G.; Ramírez-Angulo, Jaime; Institute of Smart Cities - ISC
A micropower regulated cascode CMOS current mirror is presented, combining floating gate and quasi floating gate MOS transistors to achieve both wide swing and class AB operation, respectively. Measurement results for a 0.5 μm CMOS test chip prototype are included, showing that the current mirror can provide a THD at 100 kHz of -44 dB for a supply voltage of ±0.75 V and input current amplitudes 20 times larger than the bias current.
Open Access
A 1.2-V current-mode RMS-to-DC converter based on a novel two-quadrant electronically simulated MOS translinear loop
(IEEE, 2020) Martincorena Arraiza, Maite; Cruz Blas, Carlos Aristóteles de la; Algueta-Miguel, Jose M.; López Martín, Antonio; Institute of Smart Cities - ISC
A novel current-mode CMOS RMS-to-DC converter using translinear techniques is introduced. It is based on a squarer/divider cell that is implemented using an electronically simulated loop with a novel biasing scheme that allows its operation in two quadrants. The cell is designed using a differential input current and a small signal first order filter to implement the voltage averaging, leading to a compact solution that can be used with low voltage supplies. The converter has been fabricated in a standard 130-nm CMOS process, and measurement results are provided to demonstrate the feasibility of the system.
Open Access
1-V 15-μW 130-nm CMOS super class AB OTA
(IEEE, 2020) López Martín, Antonio; Algueta-Miguel, Jose M.; Garde Luque, María Pilar; Carvajal, Ramón G.; Ramírez-Angulo, Jaime; Institute of Smart Cities - ISC
A super class AB recycling folded cascode amplifier in 130 nm CMOS is presented. It combines for the first time adaptive biasing of the differential input pair, nonlinear current mirrors with current starving and dynamic biasing of the cascode transistors in the output branch. Measurements using a ±0.5V supply show slew rate and gain bandwidth product improvement factors of 26 and 112 versus the conventional topology for the same bias currents, yielding the highest combined FoM to date.
Open Access
Super-gain-boosted miller op-amp based on nested regulated cascode techniques with FoMAOLDC =24,614kV/V.MHz.pF/µWatt
(IEEE, 2020) Paul, Anindita; Ramírez-Angulo, Jaime; López Martín, Antonio; González Carvajal, Ramón; Díaz Sánchez, Alejandro; Ingeniería Eléctrica, Electrónica y de Comunicación; Ingeniaritza Elektrikoa, Elektronikoaren eta Telekomunikazio Ingeniaritzaren
A simple technique to greatly enhance the DC open-loop gain of a Miller op-amp is introduced here. It is based on the utilization of nested regulated cascode amplifiers. It uses conventional Miller compensation and does not increase the supply voltage. The proposed scheme has a DC open-loop gain Figure of Merit FoMAOLDC=24,614kV/V.pF.MHz/µWatt. It is especially appropriate for utilization in modern deep sub-micrometer CMOS technologies with low intrinsic gain.
Open Access
Smart charging station with photovoltaic and energy storage for supplying electric buses
(IEEE, 2022) Berrueta Irigoyen, Alberto; Astrain Escola, José Javier; Puy Pérez de Laborda, Guillermo; El Hamzaoui, Ismail; Ursúa Rubio, Alfredo; Sanchis Gúrpide, Pablo; Villadangos Alonso, Jesús; Falcone Lanas, Francisco; López Martín, Antonio; Matías Maestro, Ignacio; Institute of Smart Cities - ISC
A Smart Charging Station (SCS) has been installed in the Public University of Navarre, Spain, in the framework of the H2020 Smart City Lighthouse STARDUST project. The SCS consists of a high-power electric bus charging point (300 kW), a 100 kW photovoltaic system, a 84 kWh support energy storage system based on a second-life lithiumion battery, and a monitoring and control system that allows the safe storage and convenient access to operation data. This SCS operates as a Smart Grid, being able to provide the power peaks required by the electric bus charger, reducing and smoothing the power demanded from the distribution grid and increasing the renewable energy self-consumption rate. This contribution presents a novel monitoring and control system, which is a key tool to integrate this SCS in the data infrastructure of a Smart City, as well as an energy management system able to operate the SCS to achieve the above-mentioned technical requirements. The crucial role of the monitoring and control system and the energy management system becomes evident in this work.