Person:
López Martín, Antonio

Last Name

López Martín

First Name

Antonio

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Ingeniería Eléctrica, Electrónica y de Comunicación

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ISC. Institute of Smart Cities

ORCID

0000-0001-7629-0305

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2254

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Now showing 1 - 10 of 25

Open Access
Fault detection of planetary gears based on signal space constellations
(MDPI, 2022) Martincorena Arraiza, Maite; Cruz Blas, Carlos Aristóteles de la; López Martín, Antonio; Molina Vicuña, Cristian; Matías Maestro, Ignacio; Ingeniaritza Elektrikoa, Elektronikoaren eta Telekomunikazio Ingeniaritzaren; Institute of Smart Cities - ISC; Ingeniería Eléctrica, Electrónica y de Comunicación
A new method to process the vibration signal acquired by an accelerometer placed in a planetary gearbox housing is proposed, which is useful to detect potential faults. The method is based on the phenomenological model and consists of the projection of the healthy vibration signals onto an orthonormal basis. Low pass components representation and Gram–Schmidt’s method are conveniently used to obtain such a basis. Thus, the measured signals can be represented by a set of scalars that provide information on the gear state. If these scalars are within a predefined range, then the gear can be diagnosed as correct; in the opposite case, it will require further evaluation. The method is validated using measured vibration signals obtained from a laboratory test bench.
Open Access
Distributed opportunistic wireless mapping system towards smart city service provision
(IEEE, 2021) Villadangos Alonso, Jesús; Falcone Lanas, Francisco Javier; López Martín, Antonio; Astrain Escola, José Javier; Sanchis Gúrpide, Pablo; Matías Maestro, Ignacio; Estatistika, Informatika eta Matematika; Ingeniaritza Elektrikoa, Elektronikoaren eta Telekomunikazio Ingeniaritzaren; Institute of Smart Cities - ISC; Estadística, Informática y Matemáticas; Ingeniería Eléctrica, Electrónica y de Comunicación
The knowledge of wireless signal distribution within an urban scenario can provide useful information to users as well as to enhance connectivity and device operation or to perform municipal logistics based on crowd density and user mobility patterns. In this work, a distributed wireless mapping system, based on a combination of opportunistic nodes such as smartphones which map geolocated WiFi access point connection and received power levels, and a cloud-based information gathering architecture is described. The proposed system has been tested in the framework of the Smart City platform of the city of Pamplona, providing signal distribution heat maps, which can be used for multiple municipal services.
Open Access
Energy-efficient amplifiers based on quasi-floating gate techniques
(MDPI, 2021) López Martín, Antonio; Garde Luque, María Pilar; Algueta-Miguel, Jose M.; Beloso Legarra, Javier; González Carvajal, Ramón; Ramírez-Angulo, Jaime; Ingeniaritza Elektrikoa, Elektronikoaren eta Telekomunikazio Ingeniaritzaren; Institute of Smart Cities - ISC; Ingeniería Eléctrica, Electrónica y de Comunicación
Energy efficiency is a key requirement in the design of amplifiers for modern wireless applications. The use of quasi-floating gate (QFG) transistors is a very convenient approach to achieve such energy efficiency. We illustrate different QFG circuit design techniques aimed to implement low-voltage energy-efficient class AB amplifiers. A new super class AB QFG amplifier is presented as a design example including some of the techniques described. The amplifier has been fabricated in a 130 nm CMOS test chip prototype. Measurement results confirm that low-voltage ultra low power amplifiers can be designed preserving at the same time excellent small-signal and large-signal performance.
Open Access
±0.3v bulk-driven fully differential buffer with high figures of merit
(MDPI, 2022) Gangineni, Manaswini; Ramírez-Angulo, Jaime; Vázquez-Leal, Héctor; Huerta-Chua, Jesús; López Martín, Antonio; González Carvajal, Ramón; Ingeniaritza Elektrikoa, Elektronikoaren eta Telekomunikazio Ingeniaritzaren; Institute of Smart Cities - ISC; Ingeniería Eléctrica, Electrónica y de Comunicación
A high performance bulk-driven rail-to-rail fully differential buffer operating from ±0.3V supplies in 180 nm CMOS technology is reported. It has a differential–difference input stage and common mode feedback circuits implemented with no-tail, high CMRR bulk-driven pseudo-differential cells. It operates in subthreshold, has infinite input impedance, low output impedance (1.4 kΩ), 86.77 dB DC open-loop gain, 172.91 kHz bandwidth and 0.684 µWstatic power dissipation with a 50-pF load capacitance. The buffer has power efficient class AB operation, a small signal figure of merit FOMss = 12.69 MHzpFµW-1, a large signal figure of merit FOMls = 34.89 (V/µs) pFµW-1, CMRR = 102 dB, PSRR+ = 109 dB, PSRR- = 100 dB, 1.1 µV/√Hz input noise spectral density, 0.3 mVrms input noise and 3.5 mV input DC offset voltage.
Open Access
A family of alternating current amplifiers for ultra-low frequency operation
(Wiley, 2021) Martincorena Arraiza, Maite; Carlosena García, Alfonso; Cruz Blas, Carlos Aristóteles de la; Beloso Legarra, Javier; López Martín, Antonio; Ingeniaritza Elektrikoa, Elektronikoaren eta Telekomunikazio Ingeniaritzaren; Institute of Smart Cities - ISC; Ingeniería Eléctrica, Electrónica y de Comunicación; Universidad Pública de Navarra / Nafarroako Unibertsitate Publikoa
A family of capacitively coupled alternating current (AC) amplifiers featuring ultra-low (below 1 Hz) corner frequency is presented. This is achieved by using high-gain devices which actively boost feedback resistance and thus reduce corner frequency. This procedure is often termed, though with a different purpose, as 'bootstrapping'. The proposed architectures are very general and admit several possible practical implementations. To demonstrate their usefulness, the circuits are implemented with two operational amplifiers (OA), but other active devices such as operational transconductance amplifiers (OTAs) can be alternatively used. All circuits have been theoretically analyzed, extensively simulated and measured, exhibiting high-pass cutoff frequencies as low as 30 mHz.
Open Access
Analog lock-in amplifier design using subsampling for accuracy enhancement in GMI sensor applications
(MDPI, 2023) Algueta-Miguel, Jose M.; Beato López, Juan Jesús; López Martín, Antonio; Ciencias; Zientziak; Institute of Smart Cities - ISC; Institute for Advanced Materials and Mathematics - INAMAT2; Universidad Pública de Navarra / Nafarroako Unibertsitate Publikoa, PJUPNA2005
A frequency downscaling technique for enhancing the accuracy of analog lock-in amplifier (LIA) architectures in giant magneto-impedance (GMI) sensor applications is presented in this paper. As a proof of concept, the proposed method is applied to two different LIA topologies using, respectively, analog and switching-based multiplication for phase-sensitive detection. Specifically, the operation frequency of both the input and the reference signals of the phase-sensitive detector (PSD) block of the LIA is reduced through a subsampling process using sample-and-hold (SH) circuits. A frequency downscaling from 200 kHz, which is the optimal operating frequency of the employed GMI sensor, to 1 kHz has been performed. In this way, the proposed technique exploits the inherent advantages of analog signal multiplication at low frequencies, while the principle of operation of the PSD remains unaltered. The circuits were assembled using discrete components, and the frequency downscaling proposal was experimentally validated by comparing the measurement accuracy with the equivalent conventional circuits. The experimental results revealed that the error in the signal magnitude measurements was reduced by a factor of 8 in the case of the analog multipliers and by a factor of 21 when a PSD based on switched multipliers was used. The error in-phase detection using a two-phase LIA was also reduced by more than 25%.
Open Access
Smart charging station with photovoltaic and energy storage for supplying electric buses
(IEEE, 2022) Berrueta Irigoyen, Alberto; Astrain Escola, José Javier; Puy Pérez de Laborda, Guillermo; El Hamzaoui, Ismail; Ursúa Rubio, Alfredo; Sanchis Gúrpide, Pablo; Villadangos Alonso, Jesús; Falcone Lanas, Francisco Javier; López Martín, Antonio; Matías Maestro, Ignacio; Institute of Smart Cities - ISC
A Smart Charging Station (SCS) has been installed in the Public University of Navarre, Spain, in the framework of the H2020 Smart City Lighthouse STARDUST project. The SCS consists of a high-power electric bus charging point (300 kW), a 100 kW photovoltaic system, a 84 kWh support energy storage system based on a second-life lithiumion battery, and a monitoring and control system that allows the safe storage and convenient access to operation data. This SCS operates as a Smart Grid, being able to provide the power peaks required by the electric bus charger, reducing and smoothing the power demanded from the distribution grid and increasing the renewable energy self-consumption rate. This contribution presents a novel monitoring and control system, which is a key tool to integrate this SCS in the data infrastructure of a Smart City, as well as an energy management system able to operate the SCS to achieve the above-mentioned technical requirements. The crucial role of the monitoring and control system and the energy management system becomes evident in this work.
Open Access
Single-stage class-AB non-linear current mirror OTA
(IEEE, 2022) Beloso Legarra, Javier; Cruz Blas, Carlos Aristóteles de la; López Martín, Antonio; Institute of Smart Cities - ISC
The analysis, design and experimental characterization of a single-stage class-AB operational transconductance amplifier (OTA) with enhanced large- and small-signal performance is presented. The OTA is biased in weak inversion to save power and employs a non-linear current mirror as active load, leading a boosting current directly at the output branch. As a result, the amplifier's performance is improved without additional circuit elements and/or power consumption. A chip prototype has been fabricated in a 180-nm CMOS process, consuming a quiescent power of 2.5 µW from a supply voltage of ±0.5 V and a silicon area of 0.0013 mm 2 . For a load of 160 pF, it exhibits an average slew rate of 0.94 V/µs and a gain-bandwidth product of 22.1 kHz.
Open Access
Power-efficient single-stage class-AB OTA based on non-linear nested current mirrors
(IEEE, 2023) Beloso Legarra, Javier; Cruz Blas, Carlos Aristóteles de la; López Martín, Antonio; Institute of Smart Cities - ISC
A novel approach to design low-power area-efficient rail-to-rail output single-stage class-AB operational transconductance amplifiers (OTAs) with enhanced large- and small-signal performance to drive large capacitive loads is presented. It is based on a non-linear nested current mirror at the active load of a splitted differential input pair biased in weak inversion that boosts dynamic currents beyond their quiescent value directly at the output branch. As a result, slew rate, DC gain, gainbandwidth product, settling time and noise performance are improved without additional circuit elements or power consumption. An OTA prototype has been fabricated in a 180-nm CMOS process, consuming a quiescent power of 2.9 µW from a supply voltage of ±0.5 V and a silicon area of 0.001 mm2 . Measurement results validate the advantages of the proposal, exhibiting positive and negative slew rates of 110 V/ms and −58 V/ms, respectively, and a gain-bandwidth product of 136 kHz with a phase margin of 90◦ for a capacitive load of 160 pF.
Open Access
Gain-boosted super class AB OTAs based on nested local feedback
(IEEE, 2021) Beloso Legarra, Javier; Cruz Blas, Carlos Aristóteles de la; López Martín, Antonio; Ramírez-Angulo, Jaime; Ingeniaritza Elektrikoa, Elektronikoaren eta Telekomunikazio Ingeniaritzaren; Institute of Smart Cities - ISC; Ingeniería Eléctrica y Electrónica
A new approach to design super class AB operational transcon-ductance amplifiers (OTAs) with enhanced large-signal and small-signal performance is presented. It is based on employing two nested positive and negative feedback loops at the active load of an adaptively biased differential pair in weak inversion region. As a result, DC gain, gain-bandwidth product, settling time and noise are improved compared to conventional super class AB OTAs without extra circuit nodes or power consumption. Measurement results of a 180 nm CMOS test chip prototype show a current boosting factor higher than 5000 and a nearly ideal current efficiency. Due to the ultra-low quiescent currents and high driving capability, the circuit exhibits an excellent large-signal figure-of-merit (FOML) of 236 V-1. To illustrate the applicability of the proposed approach, a differential sample-and-hold (S/H) circuit was designed and fabricated on the same test chip. Measurement results of the S/H validate the advantages of the proposal.