Person: López Martín, Antonio
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López Martín
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Antonio
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Ingeniería Eléctrica, Electrónica y de Comunicación
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ISC. Institute of Smart Cities
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0000-0001-7629-0305
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2254
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Publication Open Access AC coupled amplifier with a resistance multiplier technique for ultra-low frequency operation(Elsevier, 2022) Martincorena Arraiza, Maite; Cruz Blas, Carlos Aristóteles de la; Carlosena García, Alfonso; López Martín, Antonio; Ingeniaritza Elektrikoa, Elektronikoaren eta Telekomunikazio Ingeniaritzaren; Institute of Smart Cities - ISC; Ingeniería Eléctrica, Electrónica y de Comunicación; Universidad Pública de Navarra / Nafarroako Unibertsitate PublikoaThis paper proposes a novel, tunable AC coupled capacitive feedback amplifier, exhibiting an ultra-low high pass corner frequency. This is accomplished by actively boosting the output resistive value of a MOS transistor in weak inversion. The circuit is based on a more general architecture, recently proposed by the authors, and is analyzed in terms of its capability to achieve ultra-low frequency operation, its DC performance, and noise. The proposed technique is demonstrated via measurement results from a fabricated test chip prototype using a standard 0.18 µm CMOS technology. The proposed amplifier provides a tunable high pass corner frequency from 20 mHz to 475 mHz, consuming 4.71 μW and a total area of 0.069 mm2.Publication Open Access Wide-swing class AB regulated cascode current mirror(IEEE, 2020) Garde Luque, María Pilar; López Martín, Antonio; Cruz Blas, Carlos Aristóteles de la; Carvajal, Ramón G.; Ramírez-Angulo, Jaime; Institute of Smart Cities - ISCA micropower regulated cascode CMOS current mirror is presented, combining floating gate and quasi floating gate MOS transistors to achieve both wide swing and class AB operation, respectively. Measurement results for a 0.5 μm CMOS test chip prototype are included, showing that the current mirror can provide a THD at 100 kHz of -44 dB for a supply voltage of ±0.75 V and input current amplitudes 20 times larger than the bias current.Publication Open Access 1-V 15-μW 130-nm CMOS super class AB OTA(IEEE, 2020) López Martín, Antonio; Algueta-Miguel, Jose M.; Garde Luque, María Pilar; Carvajal, Ramón G.; Ramírez-Angulo, Jaime; Institute of Smart Cities - ISCA super class AB recycling folded cascode amplifier in 130 nm CMOS is presented. It combines for the first time adaptive biasing of the differential input pair, nonlinear current mirrors with current starving and dynamic biasing of the cascode transistors in the output branch. Measurements using a ±0.5V supply show slew rate and gain bandwidth product improvement factors of 26 and 112 versus the conventional topology for the same bias currents, yielding the highest combined FoM to date.Publication Open Access Energy-efficient amplifiers based on quasi-floating gate techniques(MDPI, 2021) López Martín, Antonio; Garde Luque, María Pilar; Algueta-Miguel, Jose M.; Beloso Legarra, Javier; González Carvajal, Ramón; Ramírez-Angulo, Jaime; Ingeniaritza Elektrikoa, Elektronikoaren eta Telekomunikazio Ingeniaritzaren; Institute of Smart Cities - ISC; Ingeniería Eléctrica, Electrónica y de ComunicaciónEnergy efficiency is a key requirement in the design of amplifiers for modern wireless applications. The use of quasi-floating gate (QFG) transistors is a very convenient approach to achieve such energy efficiency. We illustrate different QFG circuit design techniques aimed to implement low-voltage energy-efficient class AB amplifiers. A new super class AB QFG amplifier is presented as a design example including some of the techniques described. The amplifier has been fabricated in a 130 nm CMOS test chip prototype. Measurement results confirm that low-voltage ultra low power amplifiers can be designed preserving at the same time excellent small-signal and large-signal performance.Publication Open Access AC amplifiers with ultra-low corner frequency by using bootstrapping(Institution of Engineering and Technology, 2021) Martincorena Arraiza, Maite; Carlosena García, Alfonso; Cruz Blas, Carlos Aristóteles de la; López Martín, Antonio; Ingeniería Eléctrica y Electrónica; Institute of Smart Cities - ISC; Ingeniaritza Elektrikoa, Elektronikoaren eta Telekomunikazio IngeniaritzarenA novel architecture for an AC (i.e. high-pass) amplifier is proposed allowing a drastic reduction of the cutoff frequency to the sub-Hertz range. It builds upon the classic AC configuration with a high gain amplifier and a parallel RC circuit in the feedback loop, by increasing the feedback resistance through bootstrapping. Resistance multiplying factors higher than four orders of magnitude are easily achievable. The basic principle can be applied to several practical implementations, though in this letter it is demonstrate with measurement results of an op-amp based discrete implementation.Publication Open Access 360 nW gate-driven ultra-low voltage CMOS linear transconductor with 1 MHz bandwidth and wide input range(IEEE, 2020) Rico-Aniles, Héctor Daniel; Ramírez-Angulo, Jaime; López Martín, Antonio; González Carvajal, Ramón; Ingeniaritza Elektrikoa, Elektronikoaren eta Telekomunikazio Ingeniaritzaren; Institute of Smart Cities - ISC; Ingeniería Eléctrica, Electrónica y de ComunicaciónA low voltage linear transconductor is introduced. The circuit is a pseudo differential architecture that operates with ±0.2V supplies and uses 900nA total biasing current. It employs a floating battery technique to achieve low voltage operation. The transconductor has a 1MHz bandwidth. It exhibits a SNR = 72dB, SFDR = 42dB and THD = 0.83% for a 100mVpp 10kHz sinusoidal input signal. Moreover, stability is not affected by the capacitance of the signal source. The circuit has been validated with a prototype chip fabricated in a 130nm CMOS technology.