Cruz Blas, Carlos Aristóteles de laCarrillo, Juan M.2023-05-152023-05-152022De-La-Cruz-Blas, C. A., Carrillo, J. M. (2022) Low-voltage CMOS bulk-driven buffer with bootstrapping technique for gain enhancement and THD-noise reduction. En Conference on Design of Circuits and Integrated Systems, DCIS 2022: proceedings of the 37th Conference on Design of Circuits and Integrated Systems (pp. 248-251). IEEE. https://doi.org/10.1109/DCIS55711.2022.9970114.978-1-6654-5950-110.1109/DCIS55711.2022.9970114https://academica-e.unavarra.es/handle/2454/45267In this paper, a bootstrapping technique is applied to a bulk-driven voltage buffer for canceling the gate-source transconductance in order to improve the cell gain, the linearity and reduce the input-referred noise. The bootstrapped circuitry is conveniently implemented by only using a capacitor and a pseudo resistor. The suitability of the technique is demonstrated by simulation results using a flipped voltage follower, even though it is general and can be applied to other structures. A 1-V buffer is designed in 0.18 µm CMOS technology, showing a 4.3 times improvement in the voltage gain (conventional 0.21 V/V, bootstrapped 0.90 V/V), increasing 5 times the input voltage range for a 1% THD (conventional 50 mV, bootstrapped 250 mV) and reducing the input equivalent noise around a 16% (conventional 180 nV/-√Hz, bootstrapped 155 nV/√Hz at 10 kHz).application/pdfeng© 2022 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other work.BootstrappingBulk-drivenLinearized transconductorQuasi-floating gatesinfo:eu-repo/semantics/conferenceObject2023-05-15info:eu-repo/semantics/openAccess