Paul, AninditaRamírez-Angulo, JaimeLópez Martín, AntonioGonzález Carvajal, Ramón2022-02-042022-02-042019A. Paul, J. Ramírez-Angulo, A. J. Lopez-Martin and R. Gonzalez Carvajal, "CMOS First-Order All-Pass Filter With 2-Hz Pole Frequency," in IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 27, no. 2, pp. 294-303, Feb. 2019, doi: 10.1109/TVLSI.2018.2878017.1557-9999 (Electronic)10.1109/TVLSI.2018.2878017https://academica-e.unavarra.es/handle/2454/42124A CMOS fully integrated all-pass filter with an extremely low pole frequency of 2 Hz is introduced in this paper. It has 0.08-dB passband ripple and 0.029-mm2 Si area. It has 0.38-mW power consumption in strong inversion with ±0.6-V power supplies. In subthreshold, it has 0.64-uW quiescent power and operates with ±200-mV dc supplies. Miller multiplication is used to obtain a large equivalent capacitor without excessive Si area. By varying the gain of the Miller amplifier, the pole frequency can be varied from 2 to 48 Hz. Experimental and simulation results of a test chip prototype in 130-nm CMOS technology validate the proposed circuit.10 p.application/pdfeng© 2018 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other work.All-pass filter (APF)AmplifierMiller multiplierOperational transconductance amplifier (OTA)Voltage followerinfo:eu-repo/semantics/articleinfo:eu-repo/semantics/openAccess