SPARC instruction set extension for GNSS SW receivers on LEON2FT processor

Abstract

This project was born to test the idea of optimizing performance by adding new instructions to a processor. This has been done in the past, but never for this kind of applications. Implementing this idea into a real world scenario would involve a big team of experienced developers, a big budget and more time than a simple 6 months internship offers. Because this would be a big commitment, this project will help decide if it is worth the effort. This document will present all the steps from specification to final testing. 1. The first few sections will focus on technical specifications, constraints and explaining CMUL instructions in a more detailed and technical manner.

2. Implementation into the real processor VHDL code. Even the final processor is hardware, it is defined by VHDL code which will later be translated into hardware.

3. Adding instructions to the compiler and assembler. Once the processor is finished, it will be able to handle new instructions. However when programming software for that processor we must tell the assembler and compiler about the existence of those instructions and when to use them. This step was more complex than expected, so a complete tutorial on how to modify the GNU compiling toolchain and compile it will be provided step by step.

4. When both the processor and the assembler are ready some results can be tested to see if there was an improvement. The end of the project was spent proving that the modifications on the processor didn’t cause any trouble and did not interfere with normal operation.