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dc.creatorGarcía Lasheras, Javieres_ES
dc.date.accessioned2017-08-18T10:39:26Z
dc.date.available2017-08-18T10:39:26Z
dc.date.issued2007
dc.identifier.urihttps://hdl.handle.net/2454/25201
dc.descriptionVersión en inglés del trabajo presentado a las Jornadas de Computacion Reconfigurable y Aplicaciones (JCRA'07) = Spanish Workshop on Reconfigurable Computing and Applications, Zaragoza (2007).es_ES
dc.descriptionTrabajo original en español en https://hdl.handle.net/2454/25200
dc.description.abstractThis paper introduces a new approach for implementing Glocally Asynchronous – Locally Synchronous (GALS) systems over commercial available Field Programmable Gate Arrays (FPGA). This new vision is aimed to overcome the logic overhead issues that previous works exhibit when applying GALS techniques to programmable logic devices. The proposed new view relies in a 2-phase/bundled data parity based protocol for data transfer and clock generation tasks. The ability of the introduced methodology for smart real-time delay selection allows the implementation of a variety of new methodologies for electromagnetic interference mitigation and device environment changes adaptation.en
dc.format.extent12 p.
dc.format.mimetypeapplication/pdfen
dc.language.isoengen
dc.subjectGALSen
dc.subjectFPGAen
dc.titleEfficient implementation of GALS systems over comercial synchronous FPGAs: a new approachen
dc.typeContribución a congreso / Biltzarrerako ekarpenaes
dc.typeinfo:eu-repo/semantics/conferenceObjecten
dc.contributor.departmentUniversidad Pública de Navarra. Departamento de Ingeniería Eléctrica y Electrónicaes_ES
dc.contributor.departmentNafarroako Unibertsitate Publikoa. Ingeniaritza Elektriko eta Elektronikoa Sailaeu
dc.rights.accessRightsAcceso abierto / Sarbide irekiaes
dc.rights.accessRightsinfo:eu-repo/semantics/openAccessen


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