Cruz Blas, Carlos Aristóteles de la

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Cruz Blas

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Carlos Aristóteles de la

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Ingeniería Eléctrica, Electrónica y de Comunicación

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ISC. Institute of Smart Cities

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Now showing 1 - 10 of 27
  • PublicationOpen Access
    A 1.2-V current-mode RMS-to-DC converter based on a novel two-quadrant electronically simulated MOS translinear loop
    (IEEE, 2020) Martincorena Arraiza, Maite; Cruz Blas, Carlos Aristóteles de la; Algueta-Miguel, Jose M.; López Martín, Antonio; Institute of Smart Cities - ISC
    A novel current-mode CMOS RMS-to-DC converter using translinear techniques is introduced. It is based on a squarer/divider cell that is implemented using an electronically simulated loop with a novel biasing scheme that allows its operation in two quadrants. The cell is designed using a differential input current and a small signal first order filter to implement the voltage averaging, leading to a compact solution that can be used with low voltage supplies. The converter has been fabricated in a standard 130-nm CMOS process, and measurement results are provided to demonstrate the feasibility of the system.
  • PublicationOpen Access
    High-linearity tunable low-Gm transconductor based on bootstrapping
    (IEEE, 2021) Cinco-Izquierdo, Óscar J.; Cruz Blas, Carlos Aristóteles de la; Sanz-Pascual, M. Teresa; Ingeniería Eléctrica, Electrónica y de Comunicación; Ingeniaritza Elektrikoa, Elektronikoaren eta Telekomunikazio Ingeniaritzaren
    In this brief, a novel pseudo-differential low-transconductance amplifier is proposed based on the bootstrapping technique. The transconductor is implemented using two voltage follower topologies as amplifiers with their outputs connected to both terminals of a resistor, thus bootstrapping the voltages at these terminals to increase the equivalent resistance value, and achieve a very low transconductance without the need for large passive components. In this way, a highly-linear compact structure is designed whose transconductance can be tuned by external current sources. The circuit was fabricated in a standard 0.18μm CMOS process. The experimental results show a tunable transconductance in the range of tens of nA/V, with a total harmonic distortion lower than -40dB at 350mVpp@1kHz. The power consumption of the amplifier is 4μW under a 1.8V supply voltage.
  • PublicationOpen Access
    Power converter for ultra low-frequency and low-voltage energy harvesters
    (SpringerOpen, 2025-05-29) Hualde Otamendi, Mikel; Cruz Blas, Carlos Aristóteles de la; Castellano Aldave, Jesús Carlos; Carlosena García, Alfonso; Ingeniería Eléctrica, Electrónica y de Comunicación; Ingeniaritza Elektrikoa, Elektronikoa eta Telekomunikazio Ingeniaritza; Institute of Smart Cities - ISC
    Energy conversion mechanisms present in some harvesters are only able to provide very low voltage (mV) and fre‑ quency (few Hz) electrical signals, which may also have a bipolar nature (AC). These characteristics make unusable most conventional power converters to extract from them a DC voltage. This letter describes an autonomous selfstarting ultra-low voltage and frequency AC-DC converter that can start the operation for AC signals around 25 mV, and below 10 Hz. The converter has been designed with ultra-low vibration harvesters in mind, but is also of appli‑ cation to, for instance, thermoelectric generators (TEG). The circuit is basically an oscillator driven by the harvester output, which therefore converts a low-frequency and low-voltage signal into large signal oscillation amenable for further DC conversion. The proposed circuit is based on the classical Hartley oscillator, which is modifed in a non‑ trivial confguration, and optimized to be able to operate with bipolar, low frequency and voltage driving signals. This is achieved with a minimum number of passive components and a single JFET transistor. A practical prototype has been fabricated, and measurement results are obtained, demonstrating the feasibility of the approach. Moreover, a vibration harvester with the power converter proposed has been tested in real conditions in a wind turbine.
  • PublicationOpen Access
    Experimental teaching of digital PID controllers
    (IEEE, 2024-08-01) Tainta Ausejo, Santiago; Cruz Blas, Carlos Aristóteles de la; Cid Monjaraz, Jaime; Ingeniería Eléctrica, Electrónica y de Comunicación; Ingeniaritza Elektrikoa, Elektronikoa eta Telekomunikazio Ingeniaritza
    PID controllers are a fundamental building block of industrial control systems. In this paper we present a simple demonstrator that can be assembled using basic electronic components and an Arduino UNO development board as plant and digital controller, respectively. The complete system can be easily built using components that are often available in a basic electronic lab, avoiding mechanical or electromechanical systems. The proposed system is open and flexible, allowing the study of digital PID control systems and the experimental evaluation of different tuning methods.
  • PublicationOpen Access
    Low-voltage CMOS bulk-driven buffer with bootstrapping technique for gain enhancement and THD-noise reduction
    (IEEE, 2022) Cruz Blas, Carlos Aristóteles de la; Carrillo, Juan M.; Ingeniería Eléctrica, Electrónica y de Comunicación; Institute of Smart Cities - ISC; Ingeniaritza Elektrikoa, Elektronikoaren eta Telekomunikazio Ingeniaritzaren
    In this paper, a bootstrapping technique is applied to a bulk-driven voltage buffer for canceling the gate-source transconductance in order to improve the cell gain, the linearity and reduce the input-referred noise. The bootstrapped circuitry is conveniently implemented by only using a capacitor and a pseudo resistor. The suitability of the technique is demonstrated by simulation results using a flipped voltage follower, even though it is general and can be applied to other structures. A 1-V buffer is designed in 0.18 µm CMOS technology, showing a 4.3 times improvement in the voltage gain (conventional 0.21 V/V, bootstrapped 0.90 V/V), increasing 5 times the input voltage range for a 1% THD (conventional 50 mV, bootstrapped 250 mV) and reducing the input equivalent noise around a 16% (conventional 180 nV/-√Hz, bootstrapped 155 nV/√Hz at 10 kHz).
  • PublicationOpen Access
    Single-stage class-AB non-linear current mirror OTA
    (IEEE, 2022) Beloso Legarra, Javier; Cruz Blas, Carlos Aristóteles de la; López Martín, Antonio; Institute of Smart Cities - ISC
    The analysis, design and experimental characterization of a single-stage class-AB operational transconductance amplifier (OTA) with enhanced large- and small-signal performance is presented. The OTA is biased in weak inversion to save power and employs a non-linear current mirror as active load, leading a boosting current directly at the output branch. As a result, the amplifier's performance is improved without additional circuit elements and/or power consumption. A chip prototype has been fabricated in a 180-nm CMOS process, consuming a quiescent power of 2.5 µW from a supply voltage of ±0.5 V and a silicon area of 0.0013 mm 2 . For a load of 160 pF, it exhibits an average slew rate of 0.94 V/µs and a gain-bandwidth product of 22.1 kHz.
  • PublicationOpen Access
    Low-power ultrasonic front-end for cargo container monitoring
    (IEEE, 2019) Algueta-Miguel, Jose M.; García Oya, José Ramón; López Martín, Antonio; Cruz Blas, Carlos Aristóteles de la; Muñoz Chavero, Fernando; Hidalgo Fort, Eduardo; Institute of Smart Cities - ISC
    A low-power ultrasonic communication system conceived for cargo container monitoring is presented. Two piezoelectric transducers operating at 40 kHz are used for generating and acquiring an ultrasonic signal through the metallic wall, thus establishing a non-invasive inside-outside communication that preserves the container integrity. Both transducers are fixed by means of a novel magnetic case designed for optimizing data transmission. The acoustic and electrical characteristics of the ultrasonic channel are analyzed. An experimental measurement setup based on FPGA has been implemented for comparing some basic modulation and detection schemes in terms of Bit Error Rate (BER), also considering their robustness against undesired mechanical and electromagnetic perturbations. On this basis, a compact digital DBPSK modulator using a square carrier signal is proposed. Frequency and amplitude tracking algorithms are designed for optimizing the quality and robustness of the data transmission. Finally, a low-power low-rate (up to few kbps) architecture based on the previous elements is presented. All the proposed contributions are experimentally validated.
  • PublicationOpen Access
    Wide-swing class AB regulated cascode current mirror
    (IEEE, 2020) Garde Luque, María Pilar; López Martín, Antonio; Cruz Blas, Carlos Aristóteles de la; Carvajal, Ramón G.; Ramírez-Angulo, Jaime; Institute of Smart Cities - ISC
    A micropower regulated cascode CMOS current mirror is presented, combining floating gate and quasi floating gate MOS transistors to achieve both wide swing and class AB operation, respectively. Measurement results for a 0.5 μm CMOS test chip prototype are included, showing that the current mirror can provide a THD at 100 kHz of -44 dB for a supply voltage of ±0.75 V and input current amplitudes 20 times larger than the bias current.
  • PublicationOpen Access
    Low-power wide-bandwidth CMOS indirect current feedback instrumentation amplifier
    (Elsevier, 2020) Carrillo, Juan M.; Domínguez, Miguel Á.; Pérez Aloe, Raquel; Cruz Blas, Carlos Aristóteles de la; Duque Carrillo, J. Francisco; Ingeniería Eléctrica, Electrónica y de Comunicación; Ingeniaritza Elektrikoa, Elektronikoaren eta Telekomunikazio Ingeniaritzaren
    The analysis and design trade-offs of a simple and economical technique to implement wideband low-voltage CMOS instrumentation amplifiers (IAs) based on indirect current feedback (ICF), are described. The input and an output transconductors consist of two super-source-followers and a resistor. As a result, the overall performance of the IA is enhanced. A thorough analysis of the proposed technique provided valuable insight on its operation. Two different realizations in 0.35-μm CMOS technology of an IA operating with a supply voltage of 3 V, are presented. In particular, a wide bandwidth single-stage IA with fixed voltage gain equal to 50 V/V and a low-power two-stage IA with externally programmable voltage gain, have been designed and characterized by extensive simulations. The simulated results of both circuits showed an improved response in terms of bandwidth, noise and power consumption, while their overall performance is comparable to other proposed approaches in terms of common-mode rejection ratio (CMRR) and linearity (THD).
  • PublicationOpen Access
    Micropower class AB low-pass analog filter based on the super-source follower
    (IEEE, 2022) Martincorena Arraiza, Maite; Cruz Blas, Carlos Aristóteles de la; López Martín, Antonio; Carlosena García, Alfonso; Institute of Smart Cities - ISC
    An improved class AB version of the super source follower is used to implement a compact and power-efficient second order analog low-pass filter. The proposed circuit achieves a 41% power reduction as well as an improvement in linearity and pass band gain with respect to its class A counterpart. Measurement results of a test chip prototype fabricated in a 180 nm CMOS technology show a power consumption ranging from 50.3 μW to 85.27 μW for cutoff frequencies from 600 kHz to 890 kHz, with a supply voltage of ±0.75 V. A third order intermodulation distortion of −35.34 dB (for an input signal of 0.4 mV pp and 350 kHz) and a THD of −69.7 dB (for an input signal of 0.4 mV pp and 100 kHz) are measured, which results in an improvement with respect to the conventional class A version of 13.98 dB and 43.6 dB, respectively. The silicon area is 0.0592 mm 2 (using external capacitors).