Elizondo Martínez, David
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Elizondo Martínez
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David
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Ingeniería Eléctrica, Electrónica y de Comunicación
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ISC. Institute of Smart Cities
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Publication Open Access Novel two-stage three-level converter with inherently-balanced dc voltage for EV fast-charging applications(IEEE, 2023) Elizondo Martínez, David; Barrios Rípodas, Ernesto; Galdeano Bujanda, Mikel; Ursúa Rubio, Alfredo; Sanchis Gúrpide, Pablo; Ingeniería Eléctrica, Electrónica y de Comunicación; Ingeniaritza Elektrikoa, Elektronikoa eta Telekomunikazio Ingeniaritza; Institute of Smart Cities - ISC; Universidad Pública de Navarra / Nafarroako Unibertsitate PublikoaThe design of EV fast chargers faces a new challenge due to the boost in the battery voltage of electric cars and heavyduty electric vehicles. Two-stage converters, that consist of an isolated dc-dc stage and an extra regulated dc-dc converter, are attracting an increasing attention thanks to their outstanding performance. The potential benefits of multilevel converters, such as lower power losses and more compact filters, can be incorporated to two-stage architectures at the expense of simplicity due to the need of a voltage balancing method. In this article, a novel dc-dc two-stage three-level (2S3L) architecture is presented, which guarantees that the multilevel input dc voltages are balanced without any specific balancing technique or extra components. Moreover, it accomplishes lossless switching in the isolated dc-dc stage, enabling a high efficiency. A 15 kW test bench is built in order to experimentally verify the inherentlybalanced voltages. The experimental tests demonstrate that the dc-link voltages are inherently-balanced (no control needed) in both transient and steady states, and that it is robust against tolerances and faulty operation. The test bench is able to provide a wide output voltage, from 200 to 900 V, and reaches a high peak efficiency of 98.2% at rated power.Publication Open Access Turn-off overvoltage in SiC power electronic converters(IEEE, 2025-03-10) Galdeano Bujanda, Mikel; Barrios Rípodas, Ernesto; Elizondo Martínez, David; Sanchis Gúrpide, Pablo; Ingeniería Eléctrica, Electrónica y de Comunicación; Ingeniaritza Elektrikoa, Elektronikoa eta Telekomunikazio IngeniaritzaIn power electronics converters, understanding the semiconductor turn-off process is key. During turn-off, the semiconductor withstands the bus voltage plus the overvoltage produced in the parasitic inductances and due to the di/dt in the turn-off. In SiC MOSFET turn-off, this overvoltage is critical since these devices operate with higher di/dt and can be operated with blocking voltage close to their breakdown voltage. In this paper, a simple equation-based procedure that allows for an accurate overvoltage calculation in SiC MOSFET turn-off is presented. The proposed step-by-step procedure is applied to calculate the overvoltage during the turn-off of the SiC module CAB016M12FM3 for different gate resistors and switched currents. This analysis can be used to select the correct value of the gate resistor. The obtained results are validated by comparison with LTspice simulation results.