Publication:
Low-voltage 0.81mW, 1-32 CMOS VGA with 5% bandwidth variations and -38dB DC rejection

Date

2020

Authors

Rico-Aniles, Héctor Daniel
Ramírez-Angulo, Jaime
Rocha-Pérez, José Miguel
González Carvajal, Ramón

Director

Publisher

IEEE
Acceso abierto / Sarbide irekia
Artículo / Artikulua
Versión publicada / Argitaratu den bertsioa

Project identifier

ES/1PE/TEC2016-80396

Abstract

A CMOS low-voltage amplifier with approximately constant bandwidth and DC rejection is introduced. The design is based on the cascade of a wide linear input range OTA, an op-amp and a servo-loop with extremely large time constants. It operates with +/-0:45V supplies and a power consumption of 0.81mW in 180nm technology. The bandwidth changes only from 9.08MHz to 9.54MHz over a gain range from 1 to 32, it has a 9.8Hz low cutoff frequency and a DC attenuation of 38dBs. DC floating voltage sources are used to keep the gates of all differential pairs at a constant value close to a supply rail in order to operate the amplifier circuit with minimum supply voltage. The proposed circuit has small and large signal figures of merit FOMSS=5380 (MHz*pF/mW) and FOMLS=0:0085((V/ns)*pF/mA) for a nominal gain A=32.

Description

Keywords

Low-voltage, Low power, CMOS amplifiers, Transresistance amplifier, Linear transconductors.

Department

Institute of Smart Cities - ISC

Faculty/School

Degree

Doctorate program

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