±0.25 V Class-AB CMOS capacitance multiplier and precision rectifiers
dc.contributor.author | Pourashraf, Shirin | |
dc.contributor.author | Ramírez-Angulo, Jaime | |
dc.contributor.author | Hinojo Montero, José María | |
dc.contributor.author | González Carvajal, Ramón | |
dc.contributor.author | López Martín, Antonio | |
dc.contributor.department | Ingeniería Eléctrica y Electrónica | es_ES |
dc.contributor.department | Ingeniaritza Elektrikoa, Elektronikoaren eta Telekomunikazio Ingeniaritzaren | eu |
dc.date.accessioned | 2022-01-24T15:14:43Z | |
dc.date.available | 2022-01-24T15:14:43Z | |
dc.date.issued | 2019 | |
dc.description.abstract | Reduction of minimum supply requirements is a crucial aspect to decrease the power consumption in VLSI systems. A high performance capacitance multiplier able to operate with supplies as low as ±0.25 V is presented. It is based on adaptively biased class-AB current mirrors which provide high current efficiency. Measurement results of a factor 11 capacitance multiplier fabricated in 180 nm CMOS technology verify theoretical claims. Moreover, low-voltage precision rectifiers based on the same class-AB current mirrors are designed and fabricated in the same CMOS process. They generate output currents over 100 times larger than the quiescent current. Both proposed circuits have 300 nW static power dissipation when operating with ±0.25 V supplies. | en |
dc.description.sponsorship | This work was supported by the Spanish National Research Agency under Grant TEC2016-80396-C2 (AEI/FEDER) | en |
dc.format.extent | 13 p. | |
dc.format.mimetype | application/pdf | en |
dc.identifier.citation | S. Pourashraf, J. Ramírez-Angulo, J. M. Hinojo Montero, R. González-Carvajal and A. J. Lopez-Martin, "±0.25-V Class-AB CMOS Capacitance Multiplier and Precision Rectifiers," in IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 27, no. 4, pp. 830-842, April 2019, doi: 10.1109/TVLSI.2018.2881249. | en |
dc.identifier.doi | 10.1109/TVLSI.2018.2881249 | |
dc.identifier.issn | 1557-9999 | |
dc.identifier.uri | https://academica-e.unavarra.es/handle/2454/41929 | |
dc.language.iso | eng | en |
dc.publisher | IEEE | en |
dc.relation.ispartof | IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 27, NO. 4, april 2019 | en |
dc.relation.projectID | info:eu-repo/grantAgreement/AEI/Plan Estatal de Investigación Científica y Técnica y de Innovación 2013-2016/TEC2016-80396-C2/ | |
dc.relation.publisherversion | http://doi.org/10.1109/TVLSI.2018.2881249 | |
dc.rights | © 2018 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other work. | en |
dc.rights.accessRights | info:eu-repo/semantics/openAccess | |
dc.subject | Class-AB current mirror | en |
dc.subject | Capacitance multiplier | en |
dc.subject | Low supply voltage | en |
dc.subject | Precision rectifiers | en |
dc.title | ±0.25 V Class-AB CMOS capacitance multiplier and precision rectifiers | en |
dc.type | info:eu-repo/semantics/article | |
dc.type.version | info:eu-repo/semantics/acceptedVersion | |
dspace.entity.type | Publication | |
relation.isAuthorOfPublication | d3dc0470-6429-43e7-80f2-15fae67f4204 | |
relation.isAuthorOfPublication.latestForDiscovery | d3dc0470-6429-43e7-80f2-15fae67f4204 |