Publication:
A novel design method for phase-locked loops of any order and type

dc.contributor.authorCarlosena García, Alfonso
dc.contributor.authorMànuel Lázaro, Antonio
dc.contributor.departmentIngeniería Eléctrica y Electrónicaes_ES
dc.contributor.departmentIngeniaritza Elektrikoa eta Elektronikoaeu
dc.date.accessioned2017-08-18T10:39:25Z
dc.date.available2017-08-18T10:39:25Z
dc.date.issued2006
dc.description.abstractIn this paper a novel approach to the design of PLLs is presented, which can be used regardless of their Order and Type. The method stems from the fact that high-frequency poles in the loop filter determine filtering properties of the PLL, while zeropole (at the origin) pairs determine its Type and thus the loop control dynamics.en
dc.description.sponsorshipThis paper has been supported by the DGCYT, Grant DPI2003-08637-C03.en
dc.format.extent5 p.
dc.format.mimetypeapplication/pdfen
dc.identifier.citationA. Carlosena and A. Manuel-Latzaro, "A Novel Design Method for Phase-Locked Loops of any Order and Type," 2006 49th IEEE International Midwest Symposium on Circuits and Systems, San Juan, 2006, pp. 569-573. doi: 10.1109/MWSCAS.2006.381794en
dc.identifier.doi10.1109/MWSCAS.2006.381794
dc.identifier.isbn1-4244-0172-0 (Print)
dc.identifier.issn1548-3746 (Print)
dc.identifier.issn1558-3899 (Electronic)
dc.identifier.urihttps://academica-e.unavarra.es/handle/2454/25197
dc.language.isoengen
dc.publisherIEEEen
dc.relation.ispartof2006 49th IEEE International Midwest Symposium on Circuits and Systems. Puerto Rico, 2006, pp. 569-573.en
dc.relation.publisherversionhttps://doi.org/10.1109/MWSCAS.2006.381794
dc.rights© 2006 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.en
dc.rights.accessRightsAcceso abierto / Sarbide irekiaes
dc.rights.accessRightsinfo:eu-repo/semantics/openAccessen
dc.subjectPhase-locked loopsen
dc.subjectLoop filtersen
dc.subjectModulatorsen
dc.subjectFrequency sinthesizersen
dc.subjectFeedback systemsen
dc.titleA novel design method for phase-locked loops of any order and typeen
dc.typeinfo:eu-repo/semantics/conferenceObject
dc.type.versionVersión aceptada / Onetsi den bertsioaes
dc.type.versioninfo:eu-repo/semantics/acceptedVersionen
dspace.entity.typePublication
relation.isAuthorOfPublication5496a010-31bd-4211-ab51-c8f575a8545e
relation.isAuthorOfPublication.latestForDiscovery5496a010-31bd-4211-ab51-c8f575a8545e

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