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López Martín, Antonio

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López Martín

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Antonio

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Ingeniería Eléctrica, Electrónica y de Comunicación

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ISC. Institute of Smart Cities

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0000-0001-7629-0305

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2254

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Now showing 1 - 10 of 18
  • PublicationOpen Access
    ±0.25 V Class-AB CMOS capacitance multiplier and precision rectifiers
    (IEEE, 2019) Pourashraf, Shirin; Ramírez-Angulo, Jaime; Hinojo Montero, José María; González Carvajal, Ramón; López Martín, Antonio; Ingeniería Eléctrica y Electrónica; Ingeniaritza Elektrikoa, Elektronikoaren eta Telekomunikazio Ingeniaritzaren
    Reduction of minimum supply requirements is a crucial aspect to decrease the power consumption in VLSI systems. A high performance capacitance multiplier able to operate with supplies as low as ±0.25 V is presented. It is based on adaptively biased class-AB current mirrors which provide high current efficiency. Measurement results of a factor 11 capacitance multiplier fabricated in 180 nm CMOS technology verify theoretical claims. Moreover, low-voltage precision rectifiers based on the same class-AB current mirrors are designed and fabricated in the same CMOS process. They generate output currents over 100 times larger than the quiescent current. Both proposed circuits have 300 nW static power dissipation when operating with ±0.25 V supplies.
  • PublicationOpen Access
    Enhanced single-stage folded cascode OTA suitable for large capacitive loads
    (IEEE, 2018) López Martín, Antonio; Garde Luque, María Pilar; Algueta-Miguel, Jose M.; Cruz Blas, Carlos Aristóteles de la; Carvajal, Ramón G.; Ramírez-Angulo, Jaime; Institute of Smart Cities - ISC
    An enhanced single-stage folded cascode operational transconductance amplifier able to drive large capacitive loads is presented. Circuits that adaptively bias the input differential pair and the current folding stage are employed, which provide class AB operation with dynamic current boosting and increased gainbandwidth (GBW) product. Measurement results of a test chip prototype fabricated in a 0.5-µm CMOS process show an increase in slew rate and GBW by a factor of 30 and 15, respectively, versus the class A version using the same supply voltage and bias currents. Overhead in other performance metrics is small.
  • PublicationOpen Access
    Design of low-cost smart accelerometers
    (Universitat Politècnica de Catalunya, 2005) Carlosena García, Alfonso; López Martín, Antonio; Massarotto, Marco; Cruz Blas, Carlos Aristóteles de la; Lecumberri Villamediana, Pablo; Gómez Fernández, Marisol; Pintor Borobia, Jesús María; Gárriz Sanz, Sergio; Ingeniería Eléctrica y Electrónica; Matemáticas; Ingeniería Mecánica, Energética y de Materiales; Ingeniaritza Elektrikoa eta Elektronikoa; Matematika; Mekanika, Energetika eta Materialen Ingeniaritza
    The goal of this project is to design a low-cost smart accelerometer, making use of a piezoelectric element as basic sensing material, and adding a mixed-mode conditioning circuit.
  • PublicationOpen Access
    Super class AB RFC OTA with adaptive local common-mode feedback
    (Institution of Engineering and Technology, 2018) Garde Luque, María Pilar; López Martín, Antonio; Carvajal, Ramón G.; Ramírez-Angulo, Jaime; Ingeniaritza Elektrikoa, Elektronikoaren eta Telekomunikazio Ingeniaritzaren; Institute of Smart Cities - ISC; Ingeniería Eléctrica, Electrónica y de Comunicación
    A super class AB recycling folded cascode operational transconductance amplifier is presented. It employs local common-mode feedback using two matched tuneable active resistors, allowing to adapt the amplifier to different process variations and loads. Measurement results from a test chip prototype fabricated in a 0.5 μm CMOS process validate the proposal.
  • PublicationOpen Access
    Class AB amplifier with enhanced slew rate and GBW
    (John Wiley & Sons, 2019) Garde Luque, María Pilar; López Martín, Antonio; Algueta-Miguel, Jose M.; Ramírez-Angulo, Jaime; González Carvajal, Ramón; Ingeniería Eléctrica y Electrónica; Ingeniaritza Elektrikoa, Elektronikoaren eta Telekomunikazio Ingeniaritzaren
    The design of a micropower class AB operational transconductance amplifier with large dynamic current to quiescent current ratio is addressed. It is based on a compact and power-efficient adaptive biasing circuit and a class AB current follower using the Quasi-Floating Gate (QFG) technique. The amplifier has been designed and fabricated in a 0.5 um CMOS process. Simulation and measurement results show a slew rate (SR) improvement factor versus the class A version larger than 4 for the same supply voltage and bias currents, as well as enhanced small-signal performance.
  • PublicationOpen Access
    Low-power ultrasonic front-end for cargo container monitoring
    (IEEE, 2019) Algueta-Miguel, Jose M.; García Oya, José Ramón; López Martín, Antonio; Cruz Blas, Carlos Aristóteles de la; Muñoz Chavero, Fernando; Hidalgo Fort, Eduardo; Institute of Smart Cities - ISC
    A low-power ultrasonic communication system conceived for cargo container monitoring is presented. Two piezoelectric transducers operating at 40 kHz are used for generating and acquiring an ultrasonic signal through the metallic wall, thus establishing a non-invasive inside-outside communication that preserves the container integrity. Both transducers are fixed by means of a novel magnetic case designed for optimizing data transmission. The acoustic and electrical characteristics of the ultrasonic channel are analyzed. An experimental measurement setup based on FPGA has been implemented for comparing some basic modulation and detection schemes in terms of Bit Error Rate (BER), also considering their robustness against undesired mechanical and electromagnetic perturbations. On this basis, a compact digital DBPSK modulator using a square carrier signal is proposed. Frequency and amplitude tracking algorithms are designed for optimizing the quality and robustness of the data transmission. Finally, a low-power low-rate (up to few kbps) architecture based on the previous elements is presented. All the proposed contributions are experimentally validated.
  • PublicationOpen Access
    Sensing in coin discriminators
    (IEEE, 2007) Carlosena García, Alfonso; López Martín, Antonio; Arizti, Fernando; Martínez de Guereñu, Ane; Pina Insausti, José L.; García Sayés, Miguel; Ingeniería Eléctrica y Electrónica; Ingeniaritza Elektrikoa eta Elektronikoa
    This paper describes the technologies used in coin discriminator devices, stressing the improvements and novel mechanisms introduced by the authors in the past few years as a result of the cooperation with one leading company in the vending sector. Emphasis is put on how low-cost sensors are used to characterize coins (or tokens) and discriminate them from their counterfeits.
  • PublicationOpen Access
    A novel PLL architecture
    (2000) Osa, Juan I.; Carlosena García, Alfonso; López Martín, Antonio; Ingeniería Eléctrica y Electrónica; Ingeniaritza Elektrikoa eta Elektronikoa
    A novel phase-locked loop scheme is proposed in this paper, whose main distinguishing features are infinite hold-in range, pull-out range fractionally constant and also a ripple fractionally constant. To this end, it incorporates a variable gain amplifer and a frequency tunable loop filter. The driving application is the on-chip automatic tuning of slave filters, although the PLL architecture can be employed in many other applications.
  • PublicationOpen Access
    Energy harvesting approaches in IoT scenarios with very low ambient energy
    (European Association for the Development of Renewable Energy, Environment and Power Quality (EA4EPQ), 2019) López Martín, Antonio; Algueta-Miguel, Jose M.; Matías Maestro, Ignacio; Institute of Smart Cities - ISC
    The feasibility of multi-source energy harvesting in Internet of Things (IoT) scenarios with low and intermittent ambient energy is addressed. As a relevant case study, application to a smart cargo container system is analysed. The most relevant features of the main energy sources available in this target application are identified, and various transducers adapted to such sources are evaluated. Measurement results indicate that combined piezoelectric and thermoelectric generation inside cargo containers can significantly extend the battery lifetime of IoT end nodes embedded in such containers.
  • PublicationOpen Access
    Design of MOS-translinear multiplier/dividers in analog VLSI
    (Hindawi Publishing Corporation, 2000) López Martín, Antonio; Carlosena García, Alfonso; Ingeniería Eléctrica y Electrónica; Ingeniaritza Elektrikoa eta Elektronikoa
    A general framework for designing current-mode CMOS analog multiplier/divider circuits based on the cascade connection of a geometric-mean circuit and a squarer/ divider is presented. It is shown how both building blocks can be readily obtained from a generic second-order MOS translinear loop. Various implementations are proposed, featuring simplicity, favorable precision and wide dynamic range. They can be successfully employed in a wide range of analog VLSI processing tasks. Experimental results of two versions, based on stacked and folded MOS-translinear loops and fabricated in a 2.4-1am CMOS process, are provided in order to verify the correctness of the proposed approach.