Open Access
Low-power ultrasonic front-end for cargo container monitoring
(IEEE, 2019) Algueta-Miguel, Jose M.; García Oya, José Ramón; López Martín, Antonio; Cruz Blas, Carlos Aristóteles de la; Muñoz Chavero, Fernando; Hidalgo Fort, Eduardo; Institute of Smart Cities - ISC
A low-power ultrasonic communication system conceived for cargo container monitoring is presented. Two piezoelectric transducers operating at 40 kHz are used for generating and acquiring an ultrasonic signal through the metallic wall, thus establishing a non-invasive inside-outside communication that preserves the container integrity. Both transducers are fixed by means of a novel magnetic case designed for optimizing data transmission. The acoustic and electrical characteristics of the ultrasonic channel are analyzed. An experimental measurement setup based on FPGA has been implemented for comparing some basic modulation and detection schemes in terms of Bit Error Rate (BER), also considering their robustness against undesired mechanical and electromagnetic perturbations. On this basis, a compact digital DBPSK modulator using a square carrier signal is proposed. Frequency and amplitude tracking algorithms are designed for optimizing the quality and robustness of the data transmission. Finally, a low-power low-rate (up to few kbps) architecture based on the previous elements is presented. All the proposed contributions are experimentally validated.
Open Access
Buscando claves para promover la participación de la mujer en estudios de Ingeniería de Telecomunicación
(Educación Editora, 2014) Alejos, Ana V.; Milagros, María Pilar; Falcone Lanas, Francisco; López Martín, Antonio; Ingeniería Eléctrica, Electrónica y de Comunicación; Ingeniaritza Elektrikoa, Elektronikoa eta Telekomunikazio Ingeniaritza
En la presente contribución se discute la necesidad de analizar el problema de la escasa presencia de la mujer en los estudios de Ingeniería de Telecomunicación. Se describe una encuesta en curso para indagar los factores de la segregación de género en esta carrera. Asimismo, se propone trasladar al aula medidas que capten una mayor presencia femenina.
Open Access
±0.25 V Class-AB CMOS capacitance multiplier and precision rectifiers
(IEEE, 2019) Pourashraf, Shirin; Ramírez-Angulo, Jaime; Hinojo Montero, José María; González Carvajal, Ramón; López Martín, Antonio; Ingeniería Eléctrica y Electrónica; Ingeniaritza Elektrikoa, Elektronikoaren eta Telekomunikazio Ingeniaritzaren
Reduction of minimum supply requirements is a crucial aspect to decrease the power consumption in VLSI systems. A high performance capacitance multiplier able to operate with supplies as low as ±0.25 V is presented. It is based on adaptively biased class-AB current mirrors which provide high current efficiency. Measurement results of a factor 11 capacitance multiplier fabricated in 180 nm CMOS technology verify theoretical claims. Moreover, low-voltage precision rectifiers based on the same class-AB current mirrors are designed and fabricated in the same CMOS process. They generate output currents over 100 times larger than the quiescent current. Both proposed circuits have 300 nW static power dissipation when operating with ±0.25 V supplies.
Open Access
On the optimal current followers for wide-swing current-efficient amplifiers
(IEEE, 2018) López Martín, Antonio; Garde Luque, María Pilar; Carvajal, Ramón G.; Ramírez-Angulo, Jaime; Ingeniería Eléctrica, Electrónica y de Comunicación; Ingeniaritza Elektrikoa, Elektronikoaren eta Telekomunikazio Ingeniaritzaren
The design of various current followers for the implementation of OTAs with high slew rate and current efficiency is addressed. Two basic current follower topologies are compared, and modifications of both followers to improve these parameters are presented. As an application example, an enhanced recycling folded cascode OTA is proposed. Measurement results of the OTA fabricated in a 0.5 μm CMOS process show a 260% and 180% improvement in SR and GBW, respectively, for the same power consumption.
Open Access
Wide-swing class AB regulated cascode current mirror
(IEEE, 2020) Garde Luque, María Pilar; López Martín, Antonio; Cruz Blas, Carlos Aristóteles de la; Carvajal, Ramón G.; Ramírez-Angulo, Jaime; Institute of Smart Cities - ISC
A micropower regulated cascode CMOS current mirror is presented, combining floating gate and quasi floating gate MOS transistors to achieve both wide swing and class AB operation, respectively. Measurement results for a 0.5 μm CMOS test chip prototype are included, showing that the current mirror can provide a THD at 100 kHz of -44 dB for a supply voltage of ±0.75 V and input current amplitudes 20 times larger than the bias current.
Open Access
Design of MOS-translinear multiplier/dividers in analog VLSI
(Hindawi Publishing Corporation, 2000) López Martín, Antonio; Carlosena García, Alfonso; Ingeniería Eléctrica y Electrónica; Ingeniaritza Elektrikoa eta Elektronikoa
A general framework for designing current-mode CMOS analog multiplier/divider circuits based on the cascade connection of a geometric-mean circuit and a squarer/ divider is presented. It is shown how both building blocks can be readily obtained from a generic second-order MOS translinear loop. Various implementations are proposed, featuring simplicity, favorable precision and wide dynamic range. They can be successfully employed in a wide range of analog VLSI processing tasks. Experimental results of two versions, based on stacked and folded MOS-translinear loops and fabricated in a 2.4-1am CMOS process, are provided in order to verify the correctness of the proposed approach.
Open Access
Enhanced single-stage folded cascode OTA suitable for large capacitive loads
(IEEE, 2018) López Martín, Antonio; Garde Luque, María Pilar; Algueta-Miguel, Jose M.; Cruz Blas, Carlos Aristóteles de la; Carvajal, Ramón G.; Ramírez-Angulo, Jaime; Institute of Smart Cities - ISC
An enhanced single-stage folded cascode operational transconductance amplifier able to drive large capacitive loads is presented. Circuits that adaptively bias the input differential pair and the current folding stage are employed, which provide class AB operation with dynamic current boosting and increased gainbandwidth (GBW) product. Measurement results of a test chip prototype fabricated in a 0.5-µm CMOS process show an increase in slew rate and GBW by a factor of 30 and 15, respectively, versus the class A version using the same supply voltage and bias currents. Overhead in other performance metrics is small.
Open Access
Design of low-cost smart accelerometers
(Universitat Politècnica de Catalunya, 2005) Carlosena García, Alfonso; López Martín, Antonio; Massarotto, Marco; Cruz Blas, Carlos Aristóteles de la; Lecumberri Villamediana, Pablo; Gómez Fernández, Marisol; Pintor Borobia, Jesús María; Gárriz Sanz, Sergio; Ingeniería Eléctrica y Electrónica; Matemáticas; Ingeniería Mecánica, Energética y de Materiales; Ingeniaritza Elektrikoa eta Elektronikoa; Matematika; Mekanika, Energetika eta Materialen Ingeniaritza
The goal of this project is to design a low-cost smart accelerometer, making use of a piezoelectric element as basic sensing material, and adding a mixed-mode conditioning circuit.
Open Access
Super class AB RFC OTA with adaptive local common-mode feedback
(Institution of Engineering and Technology, 2018) Garde Luque, María Pilar; López Martín, Antonio; Carvajal, Ramón G.; Ramírez-Angulo, Jaime; Ingeniaritza Elektrikoa, Elektronikoaren eta Telekomunikazio Ingeniaritzaren; Institute of Smart Cities - ISC; Ingeniería Eléctrica, Electrónica y de Comunicación
A super class AB recycling folded cascode operational transconductance amplifier is presented. It employs local common-mode feedback using two matched tuneable active resistors, allowing to adapt the amplifier to different process variations and loads. Measurement results from a test chip prototype fabricated in a 0.5 μm CMOS process validate the proposal.
Open Access
Gain-boosted super class AB OTAs based on nested local feedback
(IEEE, 2021) Beloso Legarra, Javier; Cruz Blas, Carlos Aristóteles de la; López Martín, Antonio; Ramírez-Angulo, Jaime; Ingeniaritza Elektrikoa, Elektronikoaren eta Telekomunikazio Ingeniaritzaren; Institute of Smart Cities - ISC; Ingeniería Eléctrica y Electrónica
A new approach to design super class AB operational transcon-ductance amplifiers (OTAs) with enhanced large-signal and small-signal performance is presented. It is based on employing two nested positive and negative feedback loops at the active load of an adaptively biased differential pair in weak inversion region. As a result, DC gain, gain-bandwidth product, settling time and noise are improved compared to conventional super class AB OTAs without extra circuit nodes or power consumption. Measurement results of a 180 nm CMOS test chip prototype show a current boosting factor higher than 5000 and a nearly ideal current efficiency. Due to the ultra-low quiescent currents and high driving capability, the circuit exhibits an excellent large-signal figure-of-merit (FOML) of 236 V-1. To illustrate the applicability of the proposed approach, a differential sample-and-hold (S/H) circuit was designed and fabricated on the same test chip. Measurement results of the S/H validate the advantages of the proposal.