Power-efficient CMOS amplifiers for battery-supplied systems
dc.contributor.advisor | López Martín, Antonio | |
dc.contributor.advisor | Cruz Blas, Carlos Aristóteles de la | |
dc.contributor.author | Beloso Legarra, Javier | |
dc.contributor.department | Ingeniería Eléctrica, Electrónica y de Comunicación | es_ES |
dc.contributor.department | Ingeniaritza Elektrikoa, Elektronikoaren eta Telekomunikazio Ingeniaritzaren | eu |
dc.date.accessioned | 2023-12-27T11:58:57Z | |
dc.date.available | 2023-12-27T11:58:57Z | |
dc.date.issued | 2023 | |
dc.date.submitted | 2023-12-02 | |
dc.description.abstract | In this Thesis, the design of power-efficient CMOS amplifiers that are suitable for battery-supplied systems with low-voltage and low-power constraints is developed. This type of circuit is essential in modern portable systems as it performs several signal processing functions, thus requiring high-performance characteristics. To this end, novel circuit-level design techniques and methodologies have been proposed with the aim of improving the performance of the amplifier while preserving simultaneously a reduced power dissipation. The following contributions are focused on single-stage and two-stage amplifier architectures. In the case of single-stage topologies, a unified approach that allows analyzing simultaneously in a common framework the most common single-stage amplifiers for a fixed current budget has been proposed, with the addition of the latest device and circuit level techniques. The design of power-efficient single-stage amplifiers is expanded by proposing several topologies based on non-linear current mirrors as class-AB current boosting technique operating in weak inversion. To illustrate their applicability in switched-capacitor circuits, a sample-and-hold has been designed. All these circuits have been implemented in a 180-nm process and validated experimentally. Finally, a novel design methodology for two-stage amplifiers operating in weak inversion region that optimizes the gain-bandwidth product for a given current budget by exploiting the frequency compensation is proposed. In order to validate the proposal, several experimental measurements of a prototype implemented in a 0.5-μm process have been performed. | en |
dc.description.doctorateProgram | Programa de Doctorado en Tecnologías de las Comunicaciones, Bioingeniería y de las Energías Renovables (RD 99/2011) | es_ES |
dc.description.doctorateProgram | Bioingeniaritzako eta Komunikazioen eta Energia Berriztagarrien Teknologietako Doktoretza Programa (ED 99/2011) | eu |
dc.format.extent | 105 p. | |
dc.format.mimetype | application/pdf | en |
dc.identifier.doi | 10.48035/Tesis/2454/46911 | |
dc.identifier.uri | https://academica-e.unavarra.es/handle/2454/46911 | |
dc.language.iso | eng | en |
dc.relation.publisherversion | https://doi.org/10.48035/Tesis/2454/46911 | |
dc.rights | © Todos los derechos reservados | en |
dc.rights.accessRights | info:eu-repo/semantics/openAccess | |
dc.subject | Power-efficient CMOS amplifiers | en |
dc.subject | Single-stage amplifier architecture | en |
dc.subject | Two-stage amplifier architecture | en |
dc.title | Power-efficient CMOS amplifiers for battery-supplied systems | en |
dc.title.alternative | Amplificadores CMOS energéticamente eficientes para sistemas alimentados por batería | es_ES |
dc.type | info:eu-repo/semantics/doctoralThesis | |
dspace.entity.type | Publication | |
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