Publication:

Power-efficient CMOS amplifiers for battery-supplied systems

In this Thesis, the design of power-efficient CMOS amplifiers that are suitable for battery-supplied systems with low-voltage and low-power constraints is developed. This type of circuit is essential in modern portable systems as it performs several signal processing functions, thus requiring high-performance characteristics. To this end, novel circuit-level design techniques and methodologies have been proposed with the aim of improving the performance of the amplifier while preserving simultaneously a reduced power dissipation. The following contributions are focused on single-stage and two-stage amplifier architectures. In the case of single-stage topologies, a unified approach that allows analyzing simultaneously in a common framework the most common single-stage amplifiers for a fixed current budget has been proposed, with the addition of the latest device and circuit level techniques. The design of power-efficient single-stage amplifiers is expanded by proposing several topologies based on non-linear current mirrors as class-AB current boosting technique operating in weak inversion. To illustrate their applicability in switched-capacitor circuits, a sample-and-hold has been designed. All these circuits have been implemented in a 180-nm process and validated experimentally. Finally, a novel design methodology for two-stage amplifiers operating in weak inversion region that optimizes the gain-bandwidth product for a given current budget by exploiting the frequency compensation is proposed. In order to validate the proposal, several experimental measurements of a prototype implemented in a 0.5-μm process have been performed.