Publication:

Efficient implementation of GALS systems over comercial synchronous FPGAs: a new approach

This paper introduces a new approach for implementing Glocally Asynchronous – Locally Synchronous (GALS) systems over commercial available Field Programmable Gate Arrays (FPGA). This new vision is aimed to overcome the logic overhead issues that previous works exhibit when applying GALS techniques to programmable logic devices. The proposed new view relies in a 2-phase/bundled data parity based protocol for data transfer and clock generation tasks. The ability of the introduced methodology for smart real-time delay selection allows the implementation of a variety of new methodologies for electromagnetic interference mitigation and device environment changes adaptation.