Design of low power sub-threshold two-stage CMOS OTAs using different compensation techniques

Date

2018

Publisher

Acceso abierto / Sarbide irekia
Trabajo Fin de Máster / Master Amaierako Lana

Project identifier

Abstract

In this current final master thesis, different compensation techniques will be studied, simulated and compared in CMOS amplifiers. Specifically, these techniques will be applied in twostage Operational Transconductance Amplifiers (OTAs). Due to the presence of both stages, the compensation techniques will be required to maintain the stability of the system. Another important aspect to consider is the inversion mode used. The circuit will be designed using the sub-threshold mode to obtain a low voltage-low power system. Using these compensation techniques with the transistors operating in the sub-threshold mode, two OTAs will be designed. One of them will be based in a Class-A amplifier, and the another in a Class-AB amplifier which uses the Quasi Floating- Gate (QFG) transistor technique. The objective is to compare them by some Figures of Merits (FOM), and relate them to different aspects of the system such as consumption, bandwidth, phase margin or slew rate. Finally, an optimal configuration will be found by these FOM.

Description

Keywords

Analog CMOS integrated circuits, Operational transconductance amplifier (OTA), Sub-threshold, Frequency compensation, Two-stage amplifier, Figure of merit (FOM), Optimization, Class-A and Class-AB amplifiers, Quasi floating-gate (QFG)

Department

Faculty/School

Escuela Técnica Superior de Ingenieros Industriales y de Telecomunicación / Telekomunikazio eta Industria Ingeniarien Goi Mailako Eskola Teknikoa / Università degli Studi di Catania (Italia)

Degree

Máster Universitario en Ingeniería de Telecomunicación por la Universidad Pública de Navarra, Nafarroako Unibertsitate Publikoko Unibertsitate Masterra Telekomunikazio Ingeniaritzan

Doctorate program

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