Publication:
Low-voltage CMOS bulk-driven buffer with bootstrapping technique for gain enhancement and THD-noise reduction

Date

2022

Authors

Director

Publisher

IEEE
Acceso abierto / Sarbide irekia
Contribución a congreso / Biltzarrerako ekarpena
Versión aceptada / Onetsi den bertsioa

Project identifier

AEI/Plan Estatal de Investigación Científica y Técnica y de Innovación 2017-2020/RTI2018-095994-B-I00/ES/recolecta
AEI/Plan Estatal de Investigación Científica y Técnica y de Innovación 2017-2020/PID2019-107258RB-C32/ES/recolecta
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Abstract

In this paper, a bootstrapping technique is applied to a bulk-driven voltage buffer for canceling the gate-source transconductance in order to improve the cell gain, the linearity and reduce the input-referred noise. The bootstrapped circuitry is conveniently implemented by only using a capacitor and a pseudo resistor. The suitability of the technique is demonstrated by simulation results using a flipped voltage follower, even though it is general and can be applied to other structures. A 1-V buffer is designed in 0.18 µm CMOS technology, showing a 4.3 times improvement in the voltage gain (conventional 0.21 V/V, bootstrapped 0.90 V/V), increasing 5 times the input voltage range for a 1% THD (conventional 50 mV, bootstrapped 250 mV) and reducing the input equivalent noise around a 16% (conventional 180 nV/-√Hz, bootstrapped 155 nV/√Hz at 10 kHz).

Description

Keywords

Bootstrapping, Bulk-driven, Linearized transconductor, Quasi-floating gates

Department

Ingeniería Eléctrica, Electrónica y de Comunicación / Institute of Smart Cities - ISC / Ingeniaritza Elektrikoa, Elektronikoaren eta Telekomunikazio Ingeniaritzaren

Faculty/School

Degree

Doctorate program

item.page.cita

De-La-Cruz-Blas, C. A., Carrillo, J. M. (2022) Low-voltage CMOS bulk-driven buffer with bootstrapping technique for gain enhancement and THD-noise reduction. En Conference on Design of Circuits and Integrated Systems, DCIS 2022: proceedings of the 37th Conference on Design of Circuits and Integrated Systems (pp. 248-251). IEEE. https://doi.org/10.1109/DCIS55711.2022.9970114.

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